1. Field of the Invention
This invention relates to read only memories and in particular to a read only memory formed using a single layer polycrystalline silicon floating gate.
2. Prior Art
Programmable read only memories ("PROMs") are well known. Such memories can be formed in any one of a number of way. In PROM structures employing floating gates of the type disclosed in U.S. Pat. No. 4,328,565, wherein the floating gates are each overlain by a control gate comprising a second layer of conductive material such as polycrystalline silicon, those transistors which are to store a binary zero (one) have placed on the floating gate associated therewith a charge which changes the transistor's threshold voltage compared to the threshold voltage of the transistors which are to store a binary one (zero). An extensive art has developed in this technology and there are a number of different ways by which the charge can be placed on or removed from such floating gates.
Another generic class of PROMs uses programmable fuses. By passing sufficient current through a given fuse, the fuse is destroyed and a binary one (zero) is stored in the destroyed fuse, whereas an undestroyed fuse represents a binary zero (one). When it is desired to use a single layer of polycrystalline silicon in the resulting ROM there are only two ways in general in which one can manufacture the ROM. First, the ROM can be designed into the mask set, in which case the presence or absence of the single layer of polysilicon determines whether or not a functional transistor is obtained at a given address. Such a ROM cannot be changed. Second, a programmable fuse can be used which is programmed by passing sufficient current through the fuse at a selected voltage to destroy the fuse, thereby to store a binary one or zero.